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| Features * * * * * * * Low Quiescent Current, Low Drop Out Voltage Regulator 2.5V Fixed Output Voltage 3V to 5.5V Supply Operation 5 mA Maximum Load Current Power-down Mode Consumption Less Than 1 A 0.35 m CMOS Technology Typical Application: Real Time Clock (RTC), Backup Battery Supply in Mobile Terminals * Maximum Current Consumption 10 A Description RE031 is a Low Drop Out (LDO) voltage regulator macrocell with a fixed 2.5V output voltage, rated for loads up to 5 mA. It is designed to be integrated with other analog cells, digital logic, microcontrollers, DSP cores and memory blocks into system-onchip products. The circuit consists of a PMOS pass device, an error amplifier and a feedback resistive network, sized to achieve the required closed loop gain. These blocks make up the regulating loop. An internal reference voltage (bandgap voltage) has been included. The target reference voltage is 1.2V, with a tolerance of 4%, delivered by an external trimming code. Current reference is generated inside the cell through a circuit supplied by VBAT. The remote sense terminal, VSAUVS, provides regulation at the load, by connecting it together with the output terminal, V SAUV,, near a critical point to improve the regulation performance (e.g., connecting them at the package pin by double bonding thus avoiding the bonding resistance influence). A capacitor of 2.2 F connected from VSAUV to ground is needed as external compensation. Figure 1. Symbol(1) Embedded ASIC Macrocell: Power Management for Mobile Terminals (PM) RE031 Fixed 2.5V 5 mA Low Quiescent Current LDO Voltage Regulator trimbg20[9:0] vbat2a BG020 rst vsauv vbg20 vsauvs vsauvc gnd2 Note: 1. Pin names are written as they appear on the user screen when the symbol is opened in the design tool environment. Rev. 2707B-PMGMT-03/03 1 Functional Diagram Figure 2. Functional Diagram VBAT2A TRIMBG20[9:0] BANDGAP and IBIAS Iref Vref Pass Device VSAUVC RST GND2 VBG20 GND2 VSAUV VSAUVS R1 R2 GND2 Pin Description Pin Name VBAT2A VSAUV VSAUVS VSAUVC GND2 TRIMBG20 RST VBG20 I/O Power supply Analog output Analog input Analog output Ground Digital bus Digital output Analog output Type External pad External pad External pad Internal pin Internal pin Internal pin Internal pin Internal pin Function Power supply Output voltage Sense voltage Output voltage Ground Bandgap Reference Trimming POR signal Voltage reference Value 3V to 5.5V 2.4V to 2.6V 2.4V to 2.6V 2.4V to 2.6V 0 0 to VSAUV 0 to VSAUV 1.231V 2 RE031 2.5V 5 mA LDO Voltage Regulator 2707B-PMGMT-03/03 RE031 2.5V 5 mA LDO Voltage Regulator Absolute Maximum Ratings* VIN .......................................................... -0.3V to 6.5V Digital Signals......................................... -0.3V to 5.5V Output Current..................................Internally Limited Junction Temperature ..........................-20C to 150C *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Specifications(1) TA = -20C to +85C, supply voltage = 3V to 5.5V unless otherwise specified, output capacitance = 2.2 F. Table 1. Electrical Characteristics Symbol VSAUVC VSAUV ISAUV IQQ VDC VTRAN VDC VTRAN Parameter Auxiliary Operating Supply Voltage Output Voltage Output Current Quiescent Current Line Regulation Transient Line Regulation Load Regulation Transient Load Regulation ISAUV = 5 mA ISAUV = 5 mA rise time = fall time = 5 s 10% - 90% of max ISAUV 10% - 90% of max ISAUV rise time = fall time = 5 s @100 Hz @1 kHz VBAT = 3V @20 kHz @100 kHz @100 Hz PSRR Power Supply Rejection Ratio at Full Load @1 kHz VBAT = 4.25V @20 kHz @100 kHz @100 Hz @1 kHz VBAT = 5.5V @20 kHz @100 kHz VN ISD Note: Output Noise Shut Down Current 1. Obtained by considering the parasitics of a TFBGA100 Package. Bandwidth = 10 Hz to 100 kHz; output current = 5 mA 12 37 10 5 -55 -35 -12 -12 -50 -35 -13 -13 -40 -35 -13 -10 1051 1 Condition Min 2.4 2.4 Typ 2.5 2.5 Max 2.6 2.6 5 10 Unit V V mA A mV mV mV mV dB dB dB dB dB dB dB dB dB dB dB dB VRMS A 3 2707B-PMGMT-03/03 Control Modes Trimming The bandgap inside RE031 has trimming capability, i.e., it is possible to compensate the bandgap resistance variations due to process gradients through the TRIMBG20[9:0] signal. In order to reduce the sensitivity of the bandgap voltage to resistance varitions, the trimming has been designed to compensate up to 40% of resistance variations. Table 2. Truth Table Resistance Variation +35% to +40% +20% to +35% +5% to +25% -5% to +5% -15% to -5% -22.5% to -15% -27.5% to -22.5% -32.5% to -27.5% -35% to -32.5% -37.5% to -35% -40% to -37.5% TRIMBG20[9:0] 1001000000 0101000000 0011000000 0000000000 0001100000 0001010000 0001001000 0001000100 0001000010 0001000001 0001000000 Application Example A ceramic capacitor of 2.2 F with ESR between 20 m and 250 m connected from VSAUV to ground is needed for external compensation. Description Capacitor (CL) Min 1.8 Typ 2.2 Max 2.6 Units F Figure 3. Application Example Internal Voltage Reference VBAT2A Battery Pack TRIMBG20[9:0] RST Digital Core VSAUV VBG20 VSAUVC VSAUVS CL GND2 4 RE031 2.5V 5 mA LDO Voltage Regulator 2707B-PMGMT-03/03 RE031 2.5V 5 mA LDO Voltage Regulator Typical Performance Characteristics (Conditions specified on page 7.) Static Line Regulation at Full Load S ta tic L o a d R e g u la tio n V BA T= 3V V BA T= 4,25V O u tp u tV o lta g e C h a n g e [m V ] Output Voltage Change [mV] V BA T= 5,5V Battery Voltage [V] IL [m A ] Transient Line Regulation at Full Load T ra n s ie n t L o a d R e g u la tio n V BA T= 4,25V Output Voltage Change [mV] O u tp u t V o lta g e C h a n g e [m V ] V BA T= 5,5V V BA T= 3V Time [ms] T im e [m s] 5 2707B-PMGMT-03/03 Typical Performance Characteristics (Conditions specified on page 7.) P o w e r S u p p ly R e je c tio n R a tio a t F u ll L o a d V e rs u s B a tte ry V o lta g e in L o w P o w e r M o d e P o w e r S u p p ly R e je c tio n R a tio a t F u ll L o a d 3.0 0 V B AT= 5,5V 3.5 4.0 4.5 5.0 5.5 V B AT= 4,25V -10 -20 -30 -40 -50 -60 freq= 20K Hz freq= 100K Hz P S R R [d B ] P S R R [d B ] freq= 100Hz freq= 1K Hz V B AT= 3V F re q [H z ] B a tte ry V o lta g e [V ] L D O S ta rtu p a t F u ll L o a d fo r V b a t = 4 .2 5 V in L o w P ow er M ode O u tp u t N o is e S p e c tru m a t F u ll L o a d a n d V b a t=4 .2 5 V 1.0E -08 V B AT2 A O u tp u t N o ise [V ^ 2/H z ] 7 R WD O R X WS X W Q R LV H 9 # $ 1.0E -09 1.0E -10 1.0E -11 1.0E -12 1.0E -13 1.0E -14 V o lta g e [V ] V S AU V 10 T im e [s] 100 1000 F re q [H z ] 10000 100000 6 RE031 2.5V 5 mA LDO Voltage Regulator 2707B-PMGMT-03/03 RE031 2.5V 5 mA LDO Voltage Regulator Terminology Line Regulation Measures the maximum transient and DC variations of the output voltage of the LDO when the supply changes between two specified values with fixed load current; minimum rise time and fall time is 5 s. Figure 4. Line Regulation 3.4V VBAT2A 3V 5 s VSAUV VTRAN 5 s VDC Load Regulation Measures the maximum transient and DC variations of the output voltage of the LDO when the load current changes between two specified values with fixed power supply; minimum rise time and fall time is 5 s. Figure 5. Load Regulation 5 s 90% of max ISAUV ISAUV 10% of max ISAUV 5 s VSAUV VTRAN VDC 7 2707B-PMGMT-03/03 Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany TEL (49) 71-31-67-0 FAX (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland TEL (44) 1355-803-000 FAX (44) 1355-242-743 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581 literature@atmel.com Web Site http://www.atmel.com (c) Atmel Corporation 2003. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life support devices or systems. ATMEL (R), the Atmel logo and combinations thereof are registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Printed on recycled paper. 2707B-PMGMT-03/03 0M |
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